Fault Detection in the Advanced Encryption Standard

The AES (Advanced Encryption Standard) is an emerging private-key cryptographic system. Performance requirements in many applications, in particular in embedded systems like smart-cards, require a HW implementation of AES, for instance as a coprocessor or as a macrocell to be added to the embedded system. A HW implementation of such a cryptographic system requires in turn to consider the fault detection and fault tolerance topics. This paper studies the problem of fault detection in AES, using a simple single fault model. The analysis or error propagation is developed by simulation, and an architectural proposal is put forward, to implement fault detection under the single fault model. Both the data-path and the control-path of the AES function unit are taken into consideration.